SEU
SEU是Single event upset的缩写，中文译为单粒子翻转。是SEE的一种表现形式。
Single event upset (SEU) is defined by NASA as "radiation-inducederrors in microelectronic circuits caused when charged particles(usually from the radiation belts or from cosmic rays) lose energyby ionizing the medium through which they pass, leaving behind awake of electron-hole pairs." [Ref: NASA Thesaurus] SEUs are transient soft errors, and are non-destructive. A reset or rewriting of the device resultsin normal device behavior thereafter. An SEU may occur in analog,digital, or optical components, or may have effects in surroundinginterface circuitry. SEUs typically appear as transient pluses inlogic or support circuitry, or as bit flips in memory cells orregisters. Also possible is a multiple-bit SEU in which a single ion hits two or more bits causing simultaneous errors.Multiple-bit SEU is a problem for single-bit error detection and correction (EDAC) where it is impossible to assign bits within a word to different chips (e.g., a problem for DRAMs and certain SRAMs).A severe SEU is the single-event functional interrupt(SEFI) in which an SEU in the device's control circuitry places thedevice into a test mode, halt, or undefined state. The SEFI haltsnormal operations, and requires a power reset to recover.
Single event upset (SEU) is defined by NASA as "radiation-inducederrors in microelectronic circuits caused when charged particles(usually from the radiation belts or from cosmic rays) lose energyby ionizing the medium through which they pass, leaving behind awake of electron-hole pairs." [Ref: NASA Thesaurus] SEUs are transient soft errors, and are non-destructive. A reset or rewriting of the device resultsin normal device behavior thereafter. An SEU may occur in analog,digital, or optical components, or may have effects in surroundinginterface circuitry. SEUs typically appear as transient pluses inlogic or support circuitry, or as bit flips in memory cells orregisters. Also possible is a multiple-bit SEU in which a single ion hits two or more bits causing simultaneous errors.Multiple-bit SEU is a problem for single-bit error detection and correction (EDAC) where it is impossible to assign bits within a word to different chips (e.g., a problem for DRAMs and certain SRAMs).A severe SEU is the single-event functional interrupt(SEFI) in which an SEU in the device's control circuitry places thedevice into a test mode, halt, or undefined state. The SEFI haltsnormal operations, and requires a power reset to recover.
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